The present invention is directed to improving start up times in a system having a plurality of phase locked loops and more particularly to a system having a plurality of cascaded transceivers, each transceiver having a phase locked loop.
Many wireless communication systems include cascaded cellular base stations and/or radio heads connected by a Pulse Code Modulation (PCM) link, such as a T1 or E1 line. These high speed, high bandwidth lines do not include a clock line, but are still sometimes used to provide reference signals for phase locked loops within the base stations and radio heads. Phase locked loops are used, in general, to perform a wide variety of tasks, such as frequency synthesis, AM and FM detection, frequency multiplication, tone decoding, pulse synchronization of signals from noisy sources, and regeneration of clean signals, particularly in the wireless communication industry.
Where there are a plurality of base stations or radio heads on one PCM link, it has been common for a framer within the base station or radio head to receive the signal from the PCM link, extract a clock signal for use by the phase locked loop of the base station or radio head and also extract a payload signal. The payload signal is shifted and passed to a secondary framer. The phase locked loop then generates a new clock signal that is passed to the secondary framer. The secondary framer transmits over the PCM link to the downstream base stations or radio heads.
This arrangement results in a relatively long start up time, as the first phase locked loop must receive the clock signal, begin to phase lock, and settle before sending a viable signal to the secondary framer for subsequent transmission to the downstream base stations or radio heads. The phase locked loop in the second radio head or base station repeats the process, and so do the other phase locked loops, each adding start up and settling time before the subsequent base stations or radio heads can be used as intended. Further, each additional phase locked loop introduces error into the timing of the clock signal, which may impact performance of downstream base stations and radio heads.
It should be noted that while the situation described above is most common to base stations and radio heads in wireless communication systems, it is also true of other serially cascaded phase locked loops.